
Obj/FWlib_apt32f172_tc3_ctc.o:     file format elf32-csky-little


Disassembly of section .text:

00000000 <CTC_RESET_VALUE>:
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/  
void CTC_RESET_VALUE(void)									//reset value
{
  	CTC->IDR=CTC_IDR_RST;          				/**< IDR reset value      */
   0:	106a      	lrw      	r3, 0	// 28 <CTC_RESET_VALUE+0x28>
   2:	104b      	lrw      	r2, 0x1002d	// 2c <CTC_RESET_VALUE+0x2c>
   4:	9360      	ld.w      	r3, (r3, 0)
   6:	b340      	st.w      	r2, (r3, 0)
   	CTC->CSSR=CTC_CSSR_RST;		 				/**< CSSR reset value     */	
   8:	3201      	movi      	r2, 1
   a:	b341      	st.w      	r2, (r3, 0x4)
   	CTC->CEDR=CTC_CEDR_RST;						/**< CEDR reset value     */
   c:	3200      	movi      	r2, 0
   e:	b342      	st.w      	r2, (r3, 0x8)
	CTC->SRR=CTC_SRR_RST;						/**< SRR reset value      */
  10:	b343      	st.w      	r2, (r3, 0xc)
	CTC->CR=CTC_CR_RST;							/**< CR reset value       */
  12:	3230      	movi      	r2, 48
  14:	b344      	st.w      	r2, (r3, 0x10)
	CTC->PRDR=CTC_PRDR_RST;						/**< PRDR reset value     */
  16:	3201      	movi      	r2, 1
  18:	b345      	st.w      	r2, (r3, 0x14)
	CTC->TIMDR=CTC_TIMDR_RST;					/**< TIMDR reset value    */
  1a:	3200      	movi      	r2, 0
  1c:	b346      	st.w      	r2, (r3, 0x18)
	CTC->IMCR=CTC_IMCR_RST;						/**< IMCR reset value     */
  1e:	b347      	st.w      	r2, (r3, 0x1c)
	CTC->RISR=CTC_RISR_RST;						/**< RISR reset value     */
  20:	b348      	st.w      	r2, (r3, 0x20)
	CTC->MISR=CTC_MISR_RST;						/**< MISR reset value     */
  22:	b349      	st.w      	r2, (r3, 0x24)
	CTC->ICR=CTC_ICR_RST;						/**< ICR reset value      */
  24:	b34a      	st.w      	r2, (r3, 0x28)
}
  26:	783c      	rts
  28:	00000000 	.long	0x00000000
  2c:	0001002d 	.long	0x0001002d

00000030 <CTC_IO_Init>:
//(0->PD0.0(AF4);1->PC0.2(AF3))
//ReturnValue:NONE
/*************************************************************/
void CTC_IO_Init(U8_T CTC_IO_G )
{
	if(CTC_IO_G==0)
  30:	3840      	cmpnei      	r0, 0
  32:	080a      	bt      	0x46	// 46 <CTC_IO_Init+0x16>
	{
		GPIOD0->CONLR=(GPIOD0->CONLR & 0XFFFFFFF0)|0x00000007;										//CTC_IO_BUZZ(PD0.0->AF4)
  34:	117d      	lrw      	r3, 0	// 128 <CTC_stop+0x14>
  36:	310f      	movi      	r1, 15
  38:	9340      	ld.w      	r2, (r3, 0)
  3a:	9260      	ld.w      	r3, (r2, 0)
  3c:	68c5      	andn      	r3, r1
  3e:	3107      	movi      	r1, 7
  40:	6cc4      	or      	r3, r1
  42:	b260      	st.w      	r3, (r2, 0)
	}
	else if(CTC_IO_G==1)
	{
		GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFFF0FF)|0x00000600;										//CTC_IO_BUZZ(PC0.2->AF3)
	}
}
  44:	783c      	rts
	else if(CTC_IO_G==1)
  46:	3841      	cmpnei      	r0, 1
  48:	0bfe      	bt      	0x44	// 44 <CTC_IO_Init+0x14>
		GPIOC0->CONLR=(GPIOC0->CONLR & 0XFFFFF0FF)|0x00000600;										//CTC_IO_BUZZ(PC0.2->AF3)
  4a:	1179      	lrw      	r3, 0	// 12c <CTC_stop+0x18>
  4c:	32f0      	movi      	r2, 240
  4e:	9320      	ld.w      	r1, (r3, 0)
  50:	9160      	ld.w      	r3, (r1, 0)
  52:	4244      	lsli      	r2, r2, 4
  54:	68c9      	andn      	r3, r2
  56:	3ba9      	bseti      	r3, r3, 9
  58:	3baa      	bseti      	r3, r3, 10
  5a:	b160      	st.w      	r3, (r1, 0)
}
  5c:	07f4      	br      	0x44	// 44 <CTC_IO_Init+0x14>

0000005e <CTC_Clk_CMD>:
//EntryParameter:NewState
//NewState:DISABLE,ENABLE
//ReturnValue:NONE
/*************************************************************/
void CTC_Clk_CMD(FunctionalStatus NewState)
{
  5e:	1175      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
	if(NewState != DISABLE)
  60:	3840      	cmpnei      	r0, 0
	{
		CTC->CEDR |= 0x03;							//enable CTC clk 
  62:	9340      	ld.w      	r2, (r3, 0)
  64:	9262      	ld.w      	r3, (r2, 0x8)
	if(NewState != DISABLE)
  66:	0c05      	bf      	0x70	// 70 <CTC_Clk_CMD+0x12>
		CTC->CEDR |= 0x03;							//enable CTC clk 
  68:	3ba0      	bseti      	r3, r3, 0
  6a:	3ba1      	bseti      	r3, r3, 1
	}
	else
	{
		CTC->CEDR &= 0XFFFFFFFE;					//Disable CTC clk 
  6c:	b262      	st.w      	r3, (r2, 0x8)
	}
}
  6e:	783c      	rts
		CTC->CEDR &= 0XFFFFFFFE;					//Disable CTC clk 
  70:	3b80      	bclri      	r3, r3, 0
  72:	07fd      	br      	0x6c	// 6c <CTC_Clk_CMD+0xe>

00000074 <CTC_Int_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void CTC_Int_Enable(void)
{
    INTC_ISER_WRITE(TC3_INT);    
  74:	1170      	lrw      	r3, 0	// 134 <CTC_stop+0x20>
  76:	3280      	movi      	r2, 128
  78:	9360      	ld.w      	r3, (r3, 0)
  7a:	23ff      	addi      	r3, 256
  7c:	4245      	lsli      	r2, r2, 5
  7e:	b340      	st.w      	r2, (r3, 0)
}
  80:	783c      	rts

00000082 <CTC_Int_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void CTC_Int_Disable(void)
{
    INTC_ICER_WRITE(TC3_INT);    
  82:	116d      	lrw      	r3, 0	// 134 <CTC_stop+0x20>
  84:	32c0      	movi      	r2, 192
  86:	9360      	ld.w      	r3, (r3, 0)
  88:	4241      	lsli      	r2, r2, 1
  8a:	60c8      	addu      	r3, r2
  8c:	3280      	movi      	r2, 128
  8e:	4245      	lsli      	r2, r2, 5
  90:	b340      	st.w      	r2, (r3, 0)
}
  92:	783c      	rts

00000094 <CTC_Wakeup_Enable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void CTC_Wakeup_Enable(void)
{
    INTC_IWER_WRITE(TC3_INT);    
  94:	1168      	lrw      	r3, 0	// 134 <CTC_stop+0x20>
  96:	3280      	movi      	r2, 128
  98:	9360      	ld.w      	r3, (r3, 0)
  9a:	23ff      	addi      	r3, 256
  9c:	4245      	lsli      	r2, r2, 5
  9e:	b350      	st.w      	r2, (r3, 0x40)
}
  a0:	783c      	rts

000000a2 <CTC_Wakeup_Disable>:
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void CTC_Wakeup_Disable(void)
{
    INTC_IWDR_WRITE(TC3_INT);    
  a2:	1165      	lrw      	r3, 0	// 134 <CTC_stop+0x20>
  a4:	32e0      	movi      	r2, 224
  a6:	9360      	ld.w      	r3, (r3, 0)
  a8:	4241      	lsli      	r2, r2, 1
  aa:	60c8      	addu      	r3, r2
  ac:	3280      	movi      	r2, 128
  ae:	4245      	lsli      	r2, r2, 5
  b0:	b340      	st.w      	r2, (r3, 0)
}
  b2:	783c      	rts

000000b4 <CTC_INT_CMD>:
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/ 
void CTC_INT_CMD(CTC_INT_TypeDef CTC_INT_X , FunctionalStatus NewState)
{
	if (NewState != DISABLE)
  b4:	3940      	cmpnei      	r1, 0
  b6:	107f      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
  b8:	0c06      	bf      	0xc4	// c4 <CTC_INT_CMD+0x10>
	{
		CTC->IMCR |=CTC_INT_X;					//SET
  ba:	9340      	ld.w      	r2, (r3, 0)
  bc:	9267      	ld.w      	r3, (r2, 0x1c)
  be:	6c0c      	or      	r0, r3
  c0:	b207      	st.w      	r0, (r2, 0x1c)
	}
	else
	{
		CTC->IMCR &=(~CTC_INT_X);				//CLR
	}
}
  c2:	783c      	rts
		CTC->IMCR &=(~CTC_INT_X);				//CLR
  c4:	9360      	ld.w      	r3, (r3, 0)
  c6:	9347      	ld.w      	r2, (r3, 0x1c)
  c8:	6c02      	nor      	r0, r0
  ca:	6808      	and      	r0, r2
  cc:	b307      	st.w      	r0, (r3, 0x1c)
}
  ce:	07fa      	br      	0xc2	// c2 <CTC_INT_CMD+0xe>

000000d0 <CTC_Config>:
//CTC_Count_Mode_set_X:CTC_Count_Mode_set_Normal,CTC_Count_Mode_set_Period
//ReturnValue:NONE
/*************************************************************/
void CTC_Config(CTC_CLK_Source_set_TypeDef CTC_CLK_Source_set_X , CTC_BUZZ_Freq_TypeDef CTC_BUZZ_Freq_X ,
			CTC_Count_Period_TypeDef CTC_Count_Period_X )
{
  d0:	14c2      	push      	r4-r5
	if(CTC_CLK_Source_set_X==CTC_CLK_Source_set_EMOSC)
  d2:	3840      	cmpnei      	r0, 0
  d4:	1077      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
  d6:	0809      	bt      	0xe8	// e8 <CTC_Config+0x18>
	{
		CTC->CSSR&=0XFFFFFFFE;									//选择外部晶振32.768K
  d8:	9380      	ld.w      	r4, (r3, 0)
  da:	9401      	ld.w      	r0, (r4, 0x4)
  dc:	3880      	bclri      	r0, r0, 0
  de:	b401      	st.w      	r0, (r4, 0x4)
	}
	else if(CTC_CLK_Source_set_X==CTC_CLK_Source_set_ISOSC)
	{
		CTC->CSSR|=0x01;										//选择内部副频
	}
	CTC->CR=CTC_Count_Period_X|CTC_BUZZ_Freq_X;
  e0:	9360      	ld.w      	r3, (r3, 0)
  e2:	6c84      	or      	r2, r1
  e4:	b344      	st.w      	r2, (r3, 0x10)
}
  e6:	1482      	pop      	r4-r5
	else if(CTC_CLK_Source_set_X==CTC_CLK_Source_set_ISOSC)
  e8:	3841      	cmpnei      	r0, 1
  ea:	0bfb      	bt      	0xe0	// e0 <CTC_Config+0x10>
		CTC->CSSR|=0x01;										//选择内部副频
  ec:	93a0      	ld.w      	r5, (r3, 0)
  ee:	9581      	ld.w      	r4, (r5, 0x4)
  f0:	6c10      	or      	r0, r4
  f2:	b501      	st.w      	r0, (r5, 0x4)
  f4:	07f6      	br      	0xe0	// e0 <CTC_Config+0x10>

000000f6 <CTC_SoftReset>:
//EntryParameter:
//ReturnValue:none
/*************************************************************/
void CTC_SoftReset(void)
{
	CTC->SRR=0X01;
  f6:	106f      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
  f8:	3201      	movi      	r2, 1
  fa:	9360      	ld.w      	r3, (r3, 0)
  fc:	b343      	st.w      	r2, (r3, 0xc)
} 
  fe:	783c      	rts

00000100 <CTC_Start>:
//CTC start 
//EntryParameter:
//ReturnValue:none
/*************************************************************/ 
void CTC_Start(void)
{
 100:	14d0      	push      	r15
	delay_nms(100);
 102:	3064      	movi      	r0, 100
 104:	e0000000 	bsr      	0	// 0 <delay_nms>
	CTC->CR|=0X01;
 108:	106a      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
 10a:	9340      	ld.w      	r2, (r3, 0)
 10c:	9264      	ld.w      	r3, (r2, 0x10)
 10e:	3ba0      	bseti      	r3, r3, 0
 110:	b264      	st.w      	r3, (r2, 0x10)
}
 112:	1490      	pop      	r15

00000114 <CTC_stop>:
//CTC stop 
//EntryParameter:
//ReturnValue:none
/*************************************************************/ 
void CTC_stop(void)
{
 114:	14d0      	push      	r15
	delay_nms(100);
 116:	3064      	movi      	r0, 100
 118:	e0000000 	bsr      	0	// 0 <delay_nms>
	CTC->CR&=0Xfffffffe;
 11c:	1065      	lrw      	r3, 0	// 130 <CTC_stop+0x1c>
 11e:	9340      	ld.w      	r2, (r3, 0)
 120:	9264      	ld.w      	r3, (r2, 0x10)
 122:	3b80      	bclri      	r3, r3, 0
 124:	b264      	st.w      	r3, (r2, 0x10)
}
 126:	1490      	pop      	r15
	...
